/* 
 * SPDX-FileCopyrightText: Copyright (c) 1993-2014 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */


#ifndef _cl857d_h_
#define _cl857d_h_

#ifdef __cplusplus
extern "C" {
#endif

#define NV857D_CORE_CHANNEL_DMA                                                 (0x0000857D)

#define NV857D_CORE_NOTIFIER_2                                                      0x00000000
#define NV857D_CORE_NOTIFIER_2_SIZEOF                                               0x00000124
#define NV857D_CORE_NOTIFIER_2_COMPLETION_0                                         0x00000000
#define NV857D_CORE_NOTIFIER_2_COMPLETION_0_DONE                                    0:0
#define NV857D_CORE_NOTIFIER_2_COMPLETION_0_DONE_FALSE                              0x00000000
#define NV857D_CORE_NOTIFIER_2_COMPLETION_0_DONE_TRUE                               0x00000001
#define NV857D_CORE_NOTIFIER_2_COMPLETION_0_R0                                      15:1
#define NV857D_CORE_NOTIFIER_2_COMPLETION_0_TIMESTAMP                               29:16
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1                                       0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_DONE                                  0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_DONE_FALSE                            0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_DONE_TRUE                             0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_VM_USABLE4ISO                         1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_VM_USABLE4ISO_FALSE                   0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_VM_USABLE4ISO_TRUE                    0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_NVM_USABLE4ISO                        2:2
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_NVM_USABLE4ISO_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_NVM_USABLE4ISO_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_GAMMA_FOS10BPC_SUPPORTED              3:3
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_GAMMA_FOS10BPC_SUPPORTED_FALSE        0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_GAMMA_FOS10BPC_SUPPORTED_TRUE         0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_FOS_FETCH_X4AA                        20:20
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_FOS_FETCH_X4AA_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_FOS_FETCH_X4AA_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_FP16CONVERSION_GAIN_OFS               21:21
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_FP16CONVERSION_GAIN_OFS_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_FP16CONVERSION_GAIN_OFS_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_FOS_FETCH_X8AA                        22:22
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_FOS_FETCH_X8AA_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_1_FOS_FETCH_X8AA_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_2                                       0x00000002
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_2_FP16CDOS_SUPPORTED                    0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_2_FP16CDOS_SUPPORTED_FALSE              0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_2_FP16CDOS_SUPPORTED_TRUE               0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_2_SEMA_NOTIF_DELAY                      1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_2_SEMA_NOTIF_DELAY_FALSE                0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_2_SEMA_NOTIF_DELAY_TRUE                 0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_2_R2                                    31:2
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_3                                       0x00000003
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_3_R3                                    31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_4                                       0x00000004
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_4_R4                                    31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_5                                       0x00000005
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_5_R5                                    31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_6                                       0x00000006
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_6_R6                                    31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_7                                       0x00000007
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_7_R7                                    31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_8                                       0x00000008
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_8_R8                                    31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC0_9                              0x00000009
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC0_9_RGB_USABLE                   0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC0_9_RGB_USABLE_FALSE             0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC0_9_RGB_USABLE_TRUE              0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC0_9_TV_USABLE                    1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC0_9_TV_USABLE_FALSE              0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC0_9_TV_USABLE_TRUE               0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC0_9_SCART_USABLE                 3:3
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC0_9_SCART_USABLE_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC0_9_SCART_USABLE_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC0_9_R0                           31:4
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC0_10                             0x0000000A
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC0_10_R1                          31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC1_11                             0x0000000B
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC1_11_RGB_USABLE                  0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC1_11_RGB_USABLE_FALSE            0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC1_11_RGB_USABLE_TRUE             0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC1_11_TV_USABLE                   1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC1_11_TV_USABLE_FALSE             0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC1_11_TV_USABLE_TRUE              0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC1_11_SCART_USABLE                3:3
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC1_11_SCART_USABLE_FALSE          0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC1_11_SCART_USABLE_TRUE           0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC1_11_R0                          31:4
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC1_12                             0x0000000C
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC1_12_R1                          31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC2_13                             0x0000000D
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC2_13_RGB_USABLE                  0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC2_13_RGB_USABLE_FALSE            0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC2_13_RGB_USABLE_TRUE             0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC2_13_TV_USABLE                   1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC2_13_TV_USABLE_FALSE             0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC2_13_TV_USABLE_TRUE              0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC2_13_SCART_USABLE                3:3
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC2_13_SCART_USABLE_FALSE          0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC2_13_SCART_USABLE_TRUE           0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC2_13_R0                          31:4
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC2_14                             0x0000000E
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC2_14_R1                          31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC3_15                             0x0000000F
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC3_15_RGB_USABLE                  0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC3_15_RGB_USABLE_FALSE            0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC3_15_RGB_USABLE_TRUE             0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC3_15_TV_USABLE                   1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC3_15_TV_USABLE_FALSE             0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC3_15_TV_USABLE_TRUE              0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC3_15_SCART_USABLE                3:3
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC3_15_SCART_USABLE_FALSE          0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC3_15_SCART_USABLE_TRUE           0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC3_15_R0                          31:4
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC3_16                             0x00000010
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_DAC3_16_R1                          31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17                             0x00000011
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_LVDS18               0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_LVDS18_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_LVDS18_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_LVDS24               1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_LVDS24_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_LVDS24_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DUAL_LVDS18                 2:2
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DUAL_LVDS18_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DUAL_LVDS18_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DUAL_LVDS24                 3:3
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DUAL_LVDS24_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DUAL_LVDS24_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_TMDS_A               4:4
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_TMDS_A_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_TMDS_A_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_TMDS_B               5:5
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_TMDS_B_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_TMDS_B_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DUAL_SINGLE_TMDS            6:6
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DUAL_SINGLE_TMDS_FALSE      0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DUAL_SINGLE_TMDS_TRUE       0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DUAL_TMDS                   7:7
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DUAL_TMDS_FALSE             0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DUAL_TMDS_TRUE              0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DDI                         9:9
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DDI_FALSE                   0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DDI_TRUE                    0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DP_A                        10:10
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DP_A_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DP_A_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DP_B                        11:11
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DP_B_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_DP_B_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_TMDS225MHZ           12:12
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_TMDS225MHZ_FALSE     0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_SINGLE_TMDS225MHZ_TRUE      0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_17_R0                          31:14
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_18                             0x00000012
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR0_18_R1                          31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19                             0x00000013
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_LVDS18               0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_LVDS18_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_LVDS18_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_LVDS24               1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_LVDS24_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_LVDS24_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DUAL_LVDS18                 2:2
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DUAL_LVDS18_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DUAL_LVDS18_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DUAL_LVDS24                 3:3
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DUAL_LVDS24_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DUAL_LVDS24_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_TMDS_A               4:4
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_TMDS_A_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_TMDS_A_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_TMDS_B               5:5
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_TMDS_B_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_TMDS_B_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DUAL_SINGLE_TMDS            6:6
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DUAL_SINGLE_TMDS_FALSE      0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DUAL_SINGLE_TMDS_TRUE       0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DUAL_TMDS                   7:7
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DUAL_TMDS_FALSE             0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DUAL_TMDS_TRUE              0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DDI                         9:9
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DDI_FALSE                   0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DDI_TRUE                    0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DP_A                        10:10
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DP_A_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DP_A_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DP_B                        11:11
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DP_B_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_DP_B_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_TMDS225MHZ           12:12
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_TMDS225MHZ_FALSE     0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_SINGLE_TMDS225MHZ_TRUE      0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_19_R0                          31:14
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_20                             0x00000014
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR1_20_R1                          31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21                             0x00000015
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_LVDS18               0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_LVDS18_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_LVDS18_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_LVDS24               1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_LVDS24_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_LVDS24_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DUAL_LVDS18                 2:2
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DUAL_LVDS18_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DUAL_LVDS18_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DUAL_LVDS24                 3:3
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DUAL_LVDS24_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DUAL_LVDS24_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_TMDS_A               4:4
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_TMDS_A_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_TMDS_A_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_TMDS_B               5:5
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_TMDS_B_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_TMDS_B_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DUAL_SINGLE_TMDS            6:6
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DUAL_SINGLE_TMDS_FALSE      0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DUAL_SINGLE_TMDS_TRUE       0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DUAL_TMDS                   7:7
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DUAL_TMDS_FALSE             0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DUAL_TMDS_TRUE              0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DDI                         9:9
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DDI_FALSE                   0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DDI_TRUE                    0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DP_A                        10:10
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DP_A_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DP_A_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DP_B                        11:11
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DP_B_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_DP_B_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_TMDS225MHZ           12:12
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_TMDS225MHZ_FALSE     0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_SINGLE_TMDS225MHZ_TRUE      0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_21_R0                          31:14
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_22                             0x00000016
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR2_22_R1                          31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23                             0x00000017
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_LVDS18               0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_LVDS18_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_LVDS18_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_LVDS24               1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_LVDS24_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_LVDS24_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DUAL_LVDS18                 2:2
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DUAL_LVDS18_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DUAL_LVDS18_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DUAL_LVDS24                 3:3
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DUAL_LVDS24_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DUAL_LVDS24_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_TMDS_A               4:4
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_TMDS_A_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_TMDS_A_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_TMDS_B               5:5
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_TMDS_B_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_TMDS_B_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DUAL_SINGLE_TMDS            6:6
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DUAL_SINGLE_TMDS_FALSE      0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DUAL_SINGLE_TMDS_TRUE       0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DUAL_TMDS                   7:7
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DUAL_TMDS_FALSE             0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DUAL_TMDS_TRUE              0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DDI                         9:9
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DDI_FALSE                   0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DDI_TRUE                    0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DP_A                        10:10
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DP_A_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DP_A_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DP_B                        11:11
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DP_B_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_DP_B_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_TMDS225MHZ           12:12
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_TMDS225MHZ_FALSE     0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_SINGLE_TMDS225MHZ_TRUE      0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_23_R0                          31:14
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_24                             0x00000018
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR3_24_R1                          31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25                             0x00000019
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_LVDS18               0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_LVDS18_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_LVDS18_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_LVDS24               1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_LVDS24_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_LVDS24_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DUAL_LVDS18                 2:2
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DUAL_LVDS18_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DUAL_LVDS18_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DUAL_LVDS24                 3:3
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DUAL_LVDS24_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DUAL_LVDS24_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_TMDS_A               4:4
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_TMDS_A_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_TMDS_A_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_TMDS_B               5:5
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_TMDS_B_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_TMDS_B_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DUAL_SINGLE_TMDS            6:6
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DUAL_SINGLE_TMDS_FALSE      0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DUAL_SINGLE_TMDS_TRUE       0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DUAL_TMDS                   7:7
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DUAL_TMDS_FALSE             0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DUAL_TMDS_TRUE              0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DDI                         9:9
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DDI_FALSE                   0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DDI_TRUE                    0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DP_A                        10:10
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DP_A_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DP_A_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DP_B                        11:11
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DP_B_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_DP_B_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_TMDS225MHZ           12:12
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_TMDS225MHZ_FALSE     0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_SINGLE_TMDS225MHZ_TRUE      0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_25_R0                          31:14
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_26                             0x0000001A
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR4_26_R1                          31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27                             0x0000001B
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_LVDS18               0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_LVDS18_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_LVDS18_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_LVDS24               1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_LVDS24_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_LVDS24_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DUAL_LVDS18                 2:2
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DUAL_LVDS18_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DUAL_LVDS18_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DUAL_LVDS24                 3:3
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DUAL_LVDS24_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DUAL_LVDS24_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_TMDS_A               4:4
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_TMDS_A_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_TMDS_A_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_TMDS_B               5:5
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_TMDS_B_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_TMDS_B_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DUAL_SINGLE_TMDS            6:6
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DUAL_SINGLE_TMDS_FALSE      0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DUAL_SINGLE_TMDS_TRUE       0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DUAL_TMDS                   7:7
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DUAL_TMDS_FALSE             0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DUAL_TMDS_TRUE              0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DDI                         9:9
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DDI_FALSE                   0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DDI_TRUE                    0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DP_A                        10:10
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DP_A_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DP_A_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DP_B                        11:11
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DP_B_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_DP_B_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_TMDS225MHZ           12:12
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_TMDS225MHZ_FALSE     0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_SINGLE_TMDS225MHZ_TRUE      0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_27_R0                          31:14
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_28                             0x0000001C
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR5_28_R1                          31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29                             0x0000001D
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_LVDS18               0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_LVDS18_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_LVDS18_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_LVDS24               1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_LVDS24_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_LVDS24_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DUAL_LVDS18                 2:2
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DUAL_LVDS18_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DUAL_LVDS18_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DUAL_LVDS24                 3:3
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DUAL_LVDS24_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DUAL_LVDS24_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_TMDS_A               4:4
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_TMDS_A_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_TMDS_A_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_TMDS_B               5:5
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_TMDS_B_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_TMDS_B_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DUAL_SINGLE_TMDS            6:6
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DUAL_SINGLE_TMDS_FALSE      0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DUAL_SINGLE_TMDS_TRUE       0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DUAL_TMDS                   7:7
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DUAL_TMDS_FALSE             0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DUAL_TMDS_TRUE              0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DDI                         9:9
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DDI_FALSE                   0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DDI_TRUE                    0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DP_A                        10:10
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DP_A_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DP_A_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DP_B                        11:11
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DP_B_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_DP_B_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_TMDS225MHZ           12:12
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_TMDS225MHZ_FALSE     0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_SINGLE_TMDS225MHZ_TRUE      0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_29_R0                          31:14
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_30                             0x0000001E
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR6_30_R1                          31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31                             0x0000001F
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_LVDS18               0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_LVDS18_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_LVDS18_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_LVDS24               1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_LVDS24_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_LVDS24_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DUAL_LVDS18                 2:2
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DUAL_LVDS18_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DUAL_LVDS18_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DUAL_LVDS24                 3:3
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DUAL_LVDS24_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DUAL_LVDS24_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_TMDS_A               4:4
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_TMDS_A_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_TMDS_A_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_TMDS_B               5:5
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_TMDS_B_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_TMDS_B_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DUAL_SINGLE_TMDS            6:6
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DUAL_SINGLE_TMDS_FALSE      0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DUAL_SINGLE_TMDS_TRUE       0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DUAL_TMDS                   7:7
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DUAL_TMDS_FALSE             0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DUAL_TMDS_TRUE              0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DDI                         9:9
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DDI_FALSE                   0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DDI_TRUE                    0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DP_A                        10:10
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DP_A_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DP_A_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DP_B                        11:11
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DP_B_FALSE                  0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_DP_B_TRUE                   0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_TMDS225MHZ           12:12
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_TMDS225MHZ_FALSE     0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_SINGLE_TMDS225MHZ_TRUE      0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_31_R0                          31:14
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_32                             0x00000020
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_SOR7_32_R1                          31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR0_33                            0x00000021
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR0_33_EXT_TMDS_ENC               0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR0_33_EXT_TMDS_ENC_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR0_33_EXT_TMDS_ENC_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR0_33_EXT_TV_ENC                 1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR0_33_EXT_TV_ENC_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR0_33_EXT_TV_ENC_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR0_33_EXT_TMDS10BPC_ALLOWED      6:6
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR0_33_EXT_TMDS10BPC_ALLOWED_FALSE 0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR0_33_EXT_TMDS10BPC_ALLOWED_TRUE 0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR0_33_R0                         31:7
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR0_34                            0x00000022
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR0_34_R1                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR1_35                            0x00000023
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR1_35_EXT_TMDS_ENC               0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR1_35_EXT_TMDS_ENC_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR1_35_EXT_TMDS_ENC_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR1_35_EXT_TV_ENC                 1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR1_35_EXT_TV_ENC_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR1_35_EXT_TV_ENC_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR1_35_EXT_TMDS10BPC_ALLOWED      6:6
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR1_35_EXT_TMDS10BPC_ALLOWED_FALSE 0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR1_35_EXT_TMDS10BPC_ALLOWED_TRUE 0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR1_35_R0                         31:7
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR1_36                            0x00000024
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR1_36_R1                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR2_37                            0x00000025
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR2_37_EXT_TMDS_ENC               0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR2_37_EXT_TMDS_ENC_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR2_37_EXT_TMDS_ENC_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR2_37_EXT_TV_ENC                 1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR2_37_EXT_TV_ENC_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR2_37_EXT_TV_ENC_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR2_37_EXT_TMDS10BPC_ALLOWED      6:6
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR2_37_EXT_TMDS10BPC_ALLOWED_FALSE 0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR2_37_EXT_TMDS10BPC_ALLOWED_TRUE 0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR2_37_R0                         31:7
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR2_38                            0x00000026
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR2_38_R1                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR3_39                            0x00000027
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR3_39_EXT_TMDS_ENC               0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR3_39_EXT_TMDS_ENC_FALSE         0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR3_39_EXT_TMDS_ENC_TRUE          0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR3_39_EXT_TV_ENC                 1:1
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR3_39_EXT_TV_ENC_FALSE           0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR3_39_EXT_TV_ENC_TRUE            0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR3_39_EXT_TMDS10BPC_ALLOWED      6:6
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR3_39_EXT_TMDS10BPC_ALLOWED_FALSE 0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR3_39_EXT_TMDS10BPC_ALLOWED_TRUE 0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR3_39_R0                         31:7
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR3_40                            0x00000028
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_PIOR3_40_R1                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_41                            0x00000029
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_41_USABLE                     0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_41_USABLE_FALSE               0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_41_USABLE_TRUE                0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_41_R0                         31:2
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_42                            0x0000002A
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_42_MAX_PIXELS5TAP444          14:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_42_R1                         15:15
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_42_MAX_PIXELS5TAP422          30:16
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_42_R2                         31:31
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_43                            0x0000002B
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_43_MAX_PIXELS3TAP444          14:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_43_R3                         15:15
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_43_MAX_PIXELS3TAP422          30:16
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_43_R4                         31:31
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_44                            0x0000002C
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_44_MAX_PIXELS2TAP444          14:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_44_R5                         15:15
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_44_MAX_PIXELS2TAP422          30:16
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_44_R6                         31:31
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_45                            0x0000002D
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_45_R7                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_46                            0x0000002E
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_46_R8                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_47                            0x0000002F
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_47_R9                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_48                            0x00000030
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD0_48_R10                        31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_49                            0x00000031
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_49_USABLE                     0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_49_USABLE_FALSE               0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_49_USABLE_TRUE                0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_49_R0                         31:2
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_50                            0x00000032
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_50_MAX_PIXELS5TAP444          14:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_50_R1                         15:15
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_50_MAX_PIXELS5TAP422          30:16
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_50_R2                         31:31
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_51                            0x00000033
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_51_MAX_PIXELS3TAP444          14:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_51_R3                         15:15
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_51_MAX_PIXELS3TAP422          30:16
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_51_R4                         31:31
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_52                            0x00000034
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_52_MAX_PIXELS2TAP444          14:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_52_R5                         15:15
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_52_MAX_PIXELS2TAP422          30:16
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_52_R6                         31:31
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_53                            0x00000035
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_53_R7                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_54                            0x00000036
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_54_R8                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_55                            0x00000037
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_55_R9                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_56                            0x00000038
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD1_56_R10                        31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_57                            0x00000039
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_57_USABLE                     0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_57_USABLE_FALSE               0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_57_USABLE_TRUE                0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_57_R0                         31:2
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_58                            0x0000003A
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_58_MAX_PIXELS5TAP444          14:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_58_R1                         15:15
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_58_MAX_PIXELS5TAP422          30:16
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_58_R2                         31:31
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_59                            0x0000003B
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_59_MAX_PIXELS3TAP444          14:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_59_R3                         15:15
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_59_MAX_PIXELS3TAP422          30:16
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_59_R4                         31:31
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_60                            0x0000003C
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_60_MAX_PIXELS2TAP444          14:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_60_R5                         15:15
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_60_MAX_PIXELS2TAP422          30:16
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_60_R6                         31:31
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_61                            0x0000003D
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_61_R7                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_62                            0x0000003E
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_62_R8                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_63                            0x0000003F
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_63_R9                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_64                            0x00000040
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD2_64_R10                        31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_65                            0x00000041
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_65_USABLE                     0:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_65_USABLE_FALSE               0x00000000
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_65_USABLE_TRUE                0x00000001
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_65_R0                         31:2
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_66                            0x00000042
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_66_MAX_PIXELS5TAP444          14:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_66_R1                         15:15
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_66_MAX_PIXELS5TAP422          30:16
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_66_R2                         31:31
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_67                            0x00000043
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_67_MAX_PIXELS3TAP444          14:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_67_R3                         15:15
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_67_MAX_PIXELS3TAP422          30:16
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_67_R4                         31:31
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_68                            0x00000044
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_68_MAX_PIXELS2TAP444          14:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_68_R5                         15:15
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_68_MAX_PIXELS2TAP422          30:16
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_68_R6                         31:31
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_69                            0x00000045
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_69_R7                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_70                            0x00000046
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_70_R8                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_71                            0x00000047
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_71_R9                         31:0
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_72                            0x00000048
#define NV857D_CORE_NOTIFIER_2_CAPABILITIES_CAP_HEAD3_72_R10                        31:0


// dma opcode instructions
#define NV857D_DMA                                                                              0x00000000 
#define NV857D_DMA_OPCODE                                                                            31:29 
#define NV857D_DMA_OPCODE_METHOD                                                                0x00000000 
#define NV857D_DMA_OPCODE_JUMP                                                                  0x00000001 
#define NV857D_DMA_OPCODE_NONINC_METHOD                                                         0x00000002 
#define NV857D_DMA_OPCODE_SET_SUBDEVICE_MASK                                                    0x00000003 
#define NV857D_DMA_OPCODE                                                                            31:29 
#define NV857D_DMA_OPCODE_METHOD                                                                0x00000000 
#define NV857D_DMA_OPCODE_NONINC_METHOD                                                         0x00000002 
#define NV857D_DMA_METHOD_COUNT                                                                      27:18 
#define NV857D_DMA_METHOD_OFFSET                                                                      11:2 
#define NV857D_DMA_DATA                                                                               31:0 
#define NV857D_DMA_DATA_NOP                                                                     0x00000000 
#define NV857D_DMA_OPCODE                                                                            31:29 
#define NV857D_DMA_OPCODE_JUMP                                                                  0x00000001 
#define NV857D_DMA_JUMP_OFFSET                                                                        11:2 
#define NV857D_DMA_OPCODE                                                                            31:29 
#define NV857D_DMA_OPCODE_SET_SUBDEVICE_MASK                                                    0x00000003 
#define NV857D_DMA_SET_SUBDEVICE_MASK_VALUE                                                           11:0 

// class methods
#define NV857D_PUT                                                              (0x00000000)
#define NV857D_PUT_PTR                                                          11:2
#define NV857D_GET                                                              (0x00000004)
#define NV857D_GET_PTR                                                          11:2
#define NV857D_UPDATE                                                           (0x00000080)
#define NV857D_UPDATE_INTERLOCK_WITH_CURSOR0                                    0:0
#define NV857D_UPDATE_INTERLOCK_WITH_CURSOR0_DISABLE                            (0x00000000)
#define NV857D_UPDATE_INTERLOCK_WITH_CURSOR0_ENABLE                             (0x00000001)
#define NV857D_UPDATE_INTERLOCK_WITH_CURSOR1                                    8:8
#define NV857D_UPDATE_INTERLOCK_WITH_CURSOR1_DISABLE                            (0x00000000)
#define NV857D_UPDATE_INTERLOCK_WITH_CURSOR1_ENABLE                             (0x00000001)
#define NV857D_UPDATE_INTERLOCK_WITH_BASE0                                      1:1
#define NV857D_UPDATE_INTERLOCK_WITH_BASE0_DISABLE                              (0x00000000)
#define NV857D_UPDATE_INTERLOCK_WITH_BASE0_ENABLE                               (0x00000001)
#define NV857D_UPDATE_INTERLOCK_WITH_BASE1                                      9:9
#define NV857D_UPDATE_INTERLOCK_WITH_BASE1_DISABLE                              (0x00000000)
#define NV857D_UPDATE_INTERLOCK_WITH_BASE1_ENABLE                               (0x00000001)
#define NV857D_UPDATE_INTERLOCK_WITH_OVERLAY0                                   2:2
#define NV857D_UPDATE_INTERLOCK_WITH_OVERLAY0_DISABLE                           (0x00000000)
#define NV857D_UPDATE_INTERLOCK_WITH_OVERLAY0_ENABLE                            (0x00000001)
#define NV857D_UPDATE_INTERLOCK_WITH_OVERLAY1                                   10:10
#define NV857D_UPDATE_INTERLOCK_WITH_OVERLAY1_DISABLE                           (0x00000000)
#define NV857D_UPDATE_INTERLOCK_WITH_OVERLAY1_ENABLE                            (0x00000001)
#define NV857D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM0                               3:3
#define NV857D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM0_DISABLE                       (0x00000000)
#define NV857D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM0_ENABLE                        (0x00000001)
#define NV857D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM1                               11:11
#define NV857D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM1_DISABLE                       (0x00000000)
#define NV857D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM1_ENABLE                        (0x00000001)
#define NV857D_UPDATE_NOT_DRIVER_FRIENDLY                                       31:31
#define NV857D_UPDATE_NOT_DRIVER_FRIENDLY_FALSE                                 (0x00000000)
#define NV857D_UPDATE_NOT_DRIVER_FRIENDLY_TRUE                                  (0x00000001)
#define NV857D_UPDATE_NOT_DRIVER_UNFRIENDLY                                     30:30
#define NV857D_UPDATE_NOT_DRIVER_UNFRIENDLY_FALSE                               (0x00000000)
#define NV857D_UPDATE_NOT_DRIVER_UNFRIENDLY_TRUE                                (0x00000001)
#define NV857D_UPDATE_INHIBIT_INTERRUPTS                                        29:29
#define NV857D_UPDATE_INHIBIT_INTERRUPTS_FALSE                                  (0x00000000)
#define NV857D_UPDATE_INHIBIT_INTERRUPTS_TRUE                                   (0x00000001)
#define NV857D_SET_NOTIFIER_CONTROL                                             (0x00000084)
#define NV857D_SET_NOTIFIER_CONTROL_MODE                                        30:30
#define NV857D_SET_NOTIFIER_CONTROL_MODE_WRITE                                  (0x00000000)
#define NV857D_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN                           (0x00000001)
#define NV857D_SET_NOTIFIER_CONTROL_OFFSET                                      11:2
#define NV857D_SET_NOTIFIER_CONTROL_NOTIFY                                      31:31
#define NV857D_SET_NOTIFIER_CONTROL_NOTIFY_DISABLE                              (0x00000000)
#define NV857D_SET_NOTIFIER_CONTROL_NOTIFY_ENABLE                               (0x00000001)
#define NV857D_SET_CONTEXT_DMA_NOTIFIER                                         (0x00000088)
#define NV857D_SET_CONTEXT_DMA_NOTIFIER_HANDLE                                  31:0
#define NV857D_GET_CAPABILITIES                                                 (0x0000008C)
#define NV857D_GET_CAPABILITIES_DUMMY                                           31:0
#define NV857D_SET_SPARE                                                        (0x000003BC)
#define NV857D_SET_SPARE_UNUSED                                                 31:0
#define NV857D_SET_SPARE_NOOP(b)                                                (0x000003C0 + (b)*0x00000004)
#define NV857D_SET_SPARE_NOOP_UNUSED                                            31:0

#define NV857D_DAC_SET_CONTROL(a)                                               (0x00000400 + (a)*0x00000080)
#define NV857D_DAC_SET_CONTROL_OWNER                                            3:0
#define NV857D_DAC_SET_CONTROL_OWNER_NONE                                       (0x00000000)
#define NV857D_DAC_SET_CONTROL_OWNER_HEAD0                                      (0x00000001)
#define NV857D_DAC_SET_CONTROL_OWNER_HEAD1                                      (0x00000002)
#define NV857D_DAC_SET_CONTROL_SUB_OWNER                                        5:4
#define NV857D_DAC_SET_CONTROL_SUB_OWNER_NONE                                   (0x00000000)
#define NV857D_DAC_SET_CONTROL_SUB_OWNER_SUBHEAD0                               (0x00000001)
#define NV857D_DAC_SET_CONTROL_SUB_OWNER_SUBHEAD1                               (0x00000002)
#define NV857D_DAC_SET_CONTROL_SUB_OWNER_BOTH                                   (0x00000003)
#define NV857D_DAC_SET_CONTROL_PROTOCOL                                         13:8
#define NV857D_DAC_SET_CONTROL_PROTOCOL_RGB_CRT                                 (0x00000000)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_CPST_NTSC_M                             (0x00000001)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_CPST_NTSC_J                             (0x00000002)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_CPST_PAL_BDGHI                          (0x00000003)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_CPST_PAL_M                              (0x00000004)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_CPST_PAL_N                              (0x00000005)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_CPST_PAL_CN                             (0x00000006)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_COMP_NTSC_M                             (0x00000007)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_COMP_NTSC_J                             (0x00000008)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_COMP_PAL_BDGHI                          (0x00000009)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_COMP_PAL_M                              (0x0000000A)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_COMP_PAL_N                              (0x0000000B)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_COMP_PAL_CN                             (0x0000000C)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_COMP_480P_60                            (0x0000000D)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_COMP_576P_50                            (0x0000000E)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_COMP_720P_50                            (0x0000000F)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_COMP_720P_60                            (0x00000010)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_COMP_1080I_50                           (0x00000011)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_COMP_1080I_60                           (0x00000012)
#define NV857D_DAC_SET_CONTROL_PROTOCOL_CUSTOM                                  (0x0000003F)
#define NV857D_DAC_SET_CONTROL_INVALIDATE_FIRST_FIELD                           14:14
#define NV857D_DAC_SET_CONTROL_INVALIDATE_FIRST_FIELD_FALSE                     (0x00000000)
#define NV857D_DAC_SET_CONTROL_INVALIDATE_FIRST_FIELD_TRUE                      (0x00000001)
#define NV857D_DAC_SET_POLARITY(a)                                              (0x00000404 + (a)*0x00000080)
#define NV857D_DAC_SET_POLARITY_HSYNC                                           0:0
#define NV857D_DAC_SET_POLARITY_HSYNC_POSITIVE_TRUE                             (0x00000000)
#define NV857D_DAC_SET_POLARITY_HSYNC_NEGATIVE_TRUE                             (0x00000001)
#define NV857D_DAC_SET_POLARITY_VSYNC                                           1:1
#define NV857D_DAC_SET_POLARITY_VSYNC_POSITIVE_TRUE                             (0x00000000)
#define NV857D_DAC_SET_POLARITY_VSYNC_NEGATIVE_TRUE                             (0x00000001)
#define NV857D_DAC_SET_POLARITY_RESERVED                                        31:2
#define NV857D_DAC_SET_ENCODE_QUALITY(a)                                        (0x00000420 + (a)*0x00000080)
#define NV857D_DAC_SET_ENCODE_QUALITY_NOISE_FILTER_BANDPASS                     7:7
#define NV857D_DAC_SET_ENCODE_QUALITY_NOISE_FILTER_BANDPASS_BW_3_375            (0x00000000)
#define NV857D_DAC_SET_ENCODE_QUALITY_NOISE_FILTER_BANDPASS_BW_6_75             (0x00000001)
#define NV857D_DAC_SET_ENCODE_QUALITY_NOISE_GAIN                                2:0
#define NV857D_DAC_SET_ENCODE_QUALITY_NOISE_GAIN_GN_0                           (0x00000000)
#define NV857D_DAC_SET_ENCODE_QUALITY_NOISE_GAIN_GN_0_0625                      (0x00000001)
#define NV857D_DAC_SET_ENCODE_QUALITY_NOISE_GAIN_GN_0_125                       (0x00000002)
#define NV857D_DAC_SET_ENCODE_QUALITY_NOISE_GAIN_GN_0_25                        (0x00000003)
#define NV857D_DAC_SET_ENCODE_QUALITY_NOISE_GAIN_GN_0_5                         (0x00000004)
#define NV857D_DAC_SET_ENCODE_QUALITY_NOISE_GAIN_GN_1_0                         (0x00000005)
#define NV857D_DAC_SET_ENCODE_QUALITY_SHARPEN_GAIN                              6:4
#define NV857D_DAC_SET_ENCODE_QUALITY_SHARPEN_GAIN_GN_0                         (0x00000000)
#define NV857D_DAC_SET_ENCODE_QUALITY_SHARPEN_GAIN_GN_0_0625                    (0x00000001)
#define NV857D_DAC_SET_ENCODE_QUALITY_SHARPEN_GAIN_GN_0_125                     (0x00000002)
#define NV857D_DAC_SET_ENCODE_QUALITY_SHARPEN_GAIN_GN_0_25                      (0x00000003)
#define NV857D_DAC_SET_ENCODE_QUALITY_SHARPEN_GAIN_GN_0_5                       (0x00000004)
#define NV857D_DAC_SET_ENCODE_QUALITY_SHARPEN_GAIN_GN_1_0                       (0x00000005)
#define NV857D_DAC_SET_ENCODE_QUALITY_NOISE_THRSH                               15:8
#define NV857D_DAC_SET_ENCODE_QUALITY_SHARPEN_THRSH                             23:16
#define NV857D_DAC_SET_ENCODE_QUALITY_TINT                                      31:24
#define NV857D_DAC_UPDATE_ENCODER_PRESET(a)                                     (0x0000047C + (a)*0x00000080)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL                               5:0
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_RGB_CRT                       (0x00000000)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_CPST_NTSC_M                   (0x00000001)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_CPST_NTSC_J                   (0x00000002)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_CPST_PAL_BDGHI                (0x00000003)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_CPST_PAL_M                    (0x00000004)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_CPST_PAL_N                    (0x00000005)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_CPST_PAL_CN                   (0x00000006)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_COMP_NTSC_M                   (0x00000007)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_COMP_NTSC_J                   (0x00000008)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_COMP_PAL_BDGHI                (0x00000009)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_COMP_PAL_M                    (0x0000000A)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_COMP_PAL_N                    (0x0000000B)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_COMP_PAL_CN                   (0x0000000C)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_COMP_480P_60                  (0x0000000D)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_COMP_576P_50                  (0x0000000E)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_COMP_720P_50                  (0x0000000F)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_COMP_720P_60                  (0x00000010)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_COMP_1080I_50                 (0x00000011)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_COMP_1080I_60                 (0x00000012)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_PROTOCOL_CUSTOM                        (0x0000003F)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_COMP_FORMAT                            6:6
#define NV857D_DAC_UPDATE_ENCODER_PRESET_COMP_FORMAT_RGB                        (0x00000000)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_COMP_FORMAT_YUV                        (0x00000001)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_ENABLE_SYNC_ON_R                       7:7
#define NV857D_DAC_UPDATE_ENCODER_PRESET_ENABLE_SYNC_ON_R_DISABLE               (0x00000000)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_ENABLE_SYNC_ON_R_ENABLE                (0x00000001)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_ENABLE_SYNC_ON_G                       8:8
#define NV857D_DAC_UPDATE_ENCODER_PRESET_ENABLE_SYNC_ON_G_DISABLE               (0x00000000)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_ENABLE_SYNC_ON_G_ENABLE                (0x00000001)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_ENABLE_SYNC_ON_B                       9:9
#define NV857D_DAC_UPDATE_ENCODER_PRESET_ENABLE_SYNC_ON_B_DISABLE               (0x00000000)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_ENABLE_SYNC_ON_B_ENABLE                (0x00000001)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_LUMA_NOTCH                             12:10
#define NV857D_DAC_UPDATE_ENCODER_PRESET_LUMA_NOTCH_NONE                        (0x00000000)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_LUMA_NOTCH_NARROW_358                  (0x00000001)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_LUMA_NOTCH_WIDE_358                    (0x00000002)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_LUMA_NOTCH_NARROW_443                  (0x00000003)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_LUMA_NOTCH_WIDE_443                    (0x00000004)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_CHROMA_BW_NARROW                       13:13
#define NV857D_DAC_UPDATE_ENCODER_PRESET_CHROMA_BW_NARROW_BW_0_6                (0x00000000)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_CHROMA_BW_NARROW_BW_1_4                (0x00000001)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_CPST_FILTER                            15:15
#define NV857D_DAC_UPDATE_ENCODER_PRESET_CPST_FILTER_NARROW                     (0x00000000)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_CPST_FILTER_WIDE                       (0x00000001)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_COMP_FILTER                            16:16
#define NV857D_DAC_UPDATE_ENCODER_PRESET_COMP_FILTER_NARROW                     (0x00000000)
#define NV857D_DAC_UPDATE_ENCODER_PRESET_COMP_FILTER_WIDE                       (0x00000001)

#define NV857D_SOR_SET_CONTROL(a)                                               (0x00000600 + (a)*0x00000040)
#define NV857D_SOR_SET_CONTROL_OWNER                                            3:0
#define NV857D_SOR_SET_CONTROL_OWNER_NONE                                       (0x00000000)
#define NV857D_SOR_SET_CONTROL_OWNER_HEAD0                                      (0x00000001)
#define NV857D_SOR_SET_CONTROL_OWNER_HEAD1                                      (0x00000002)
#define NV857D_SOR_SET_CONTROL_SUB_OWNER                                        5:4
#define NV857D_SOR_SET_CONTROL_SUB_OWNER_NONE                                   (0x00000000)
#define NV857D_SOR_SET_CONTROL_SUB_OWNER_SUBHEAD0                               (0x00000001)
#define NV857D_SOR_SET_CONTROL_SUB_OWNER_SUBHEAD1                               (0x00000002)
#define NV857D_SOR_SET_CONTROL_SUB_OWNER_BOTH                                   (0x00000003)
#define NV857D_SOR_SET_CONTROL_PROTOCOL                                         11:8
#define NV857D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM                             (0x00000000)
#define NV857D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_A                           (0x00000001)
#define NV857D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_B                           (0x00000002)
#define NV857D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_AB                          (0x00000003)
#define NV857D_SOR_SET_CONTROL_PROTOCOL_DUAL_SINGLE_TMDS                        (0x00000004)
#define NV857D_SOR_SET_CONTROL_PROTOCOL_DUAL_TMDS                               (0x00000005)
#define NV857D_SOR_SET_CONTROL_PROTOCOL_DDI_OUT                                 (0x00000007)
#define NV857D_SOR_SET_CONTROL_PROTOCOL_DP_A                                    (0x00000008)
#define NV857D_SOR_SET_CONTROL_PROTOCOL_DP_B                                    (0x00000009)
#define NV857D_SOR_SET_CONTROL_PROTOCOL_CUSTOM                                  (0x0000000F)
#define NV857D_SOR_SET_CONTROL_HSYNC_POLARITY                                   12:12
#define NV857D_SOR_SET_CONTROL_HSYNC_POLARITY_POSITIVE_TRUE                     (0x00000000)
#define NV857D_SOR_SET_CONTROL_HSYNC_POLARITY_NEGATIVE_TRUE                     (0x00000001)
#define NV857D_SOR_SET_CONTROL_VSYNC_POLARITY                                   13:13
#define NV857D_SOR_SET_CONTROL_VSYNC_POLARITY_POSITIVE_TRUE                     (0x00000000)
#define NV857D_SOR_SET_CONTROL_VSYNC_POLARITY_NEGATIVE_TRUE                     (0x00000001)
#define NV857D_SOR_SET_CONTROL_DE_SYNC_POLARITY                                 14:14
#define NV857D_SOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE                   (0x00000000)
#define NV857D_SOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE                   (0x00000001)
#define NV857D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE                             21:20
#define NV857D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_OFF                         (0x00000000)
#define NV857D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X2                          (0x00000001)
#define NV857D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X4                          (0x00000002)
#define NV857D_SOR_SET_CONTROL_PIXEL_DEPTH                                      19:16
#define NV857D_SOR_SET_CONTROL_PIXEL_DEPTH_DEFAULT                              (0x00000000)
#define NV857D_SOR_SET_CONTROL_PIXEL_DEPTH_BPP_16_422                           (0x00000001)
#define NV857D_SOR_SET_CONTROL_PIXEL_DEPTH_BPP_18_444                           (0x00000002)
#define NV857D_SOR_SET_CONTROL_PIXEL_DEPTH_BPP_20_422                           (0x00000003)
#define NV857D_SOR_SET_CONTROL_PIXEL_DEPTH_BPP_24_422                           (0x00000004)
#define NV857D_SOR_SET_CONTROL_PIXEL_DEPTH_BPP_24_444                           (0x00000005)
#define NV857D_SOR_SET_CONTROL_PIXEL_DEPTH_BPP_30_444                           (0x00000006)
#define NV857D_SOR_SET_CONTROL_PIXEL_DEPTH_BPP_32_422                           (0x00000007)
#define NV857D_SOR_SET_CONTROL_PIXEL_DEPTH_BPP_36_444                           (0x00000008)
#define NV857D_SOR_SET_CONTROL_PIXEL_DEPTH_BPP_48_444                           (0x00000009)

#define NV857D_PIOR_SET_CONTROL(a)                                              (0x00000700 + (a)*0x00000040)
#define NV857D_PIOR_SET_CONTROL_OWNER                                           3:0
#define NV857D_PIOR_SET_CONTROL_OWNER_NONE                                      (0x00000000)
#define NV857D_PIOR_SET_CONTROL_OWNER_HEAD0                                     (0x00000001)
#define NV857D_PIOR_SET_CONTROL_OWNER_HEAD1                                     (0x00000002)
#define NV857D_PIOR_SET_CONTROL_SUB_OWNER                                       5:4
#define NV857D_PIOR_SET_CONTROL_SUB_OWNER_NONE                                  (0x00000000)
#define NV857D_PIOR_SET_CONTROL_SUB_OWNER_SUBHEAD0                              (0x00000001)
#define NV857D_PIOR_SET_CONTROL_SUB_OWNER_SUBHEAD1                              (0x00000002)
#define NV857D_PIOR_SET_CONTROL_SUB_OWNER_BOTH                                  (0x00000003)
#define NV857D_PIOR_SET_CONTROL_PROTOCOL                                        11:8
#define NV857D_PIOR_SET_CONTROL_PROTOCOL_EXT_TMDS_ENC                           (0x00000000)
#define NV857D_PIOR_SET_CONTROL_PROTOCOL_EXT_TV_ENC                             (0x00000001)
#define NV857D_PIOR_SET_CONTROL_HSYNC_POLARITY                                  12:12
#define NV857D_PIOR_SET_CONTROL_HSYNC_POLARITY_POSITIVE_TRUE                    (0x00000000)
#define NV857D_PIOR_SET_CONTROL_HSYNC_POLARITY_NEGATIVE_TRUE                    (0x00000001)
#define NV857D_PIOR_SET_CONTROL_VSYNC_POLARITY                                  13:13
#define NV857D_PIOR_SET_CONTROL_VSYNC_POLARITY_POSITIVE_TRUE                    (0x00000000)
#define NV857D_PIOR_SET_CONTROL_VSYNC_POLARITY_NEGATIVE_TRUE                    (0x00000001)
#define NV857D_PIOR_SET_CONTROL_DE_SYNC_POLARITY                                14:14
#define NV857D_PIOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE                  (0x00000000)
#define NV857D_PIOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE                  (0x00000001)
#define NV857D_PIOR_SET_CONTROL_PIXEL_DEPTH                                     19:16
#define NV857D_PIOR_SET_CONTROL_PIXEL_DEPTH_DEFAULT                             (0x00000000)
#define NV857D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_16_422                          (0x00000001)
#define NV857D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_18_444                          (0x00000002)
#define NV857D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_20_422                          (0x00000003)
#define NV857D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_24_422                          (0x00000004)
#define NV857D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_24_444                          (0x00000005)
#define NV857D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_30_444                          (0x00000006)
#define NV857D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_32_422                          (0x00000007)
#define NV857D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_36_444                          (0x00000008)
#define NV857D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_48_444                          (0x00000009)

#define NV857D_HEAD_SET_PRESENT_CONTROL(a)                                      (0x00000800 + (a)*0x00000400)
#define NV857D_HEAD_SET_PRESENT_CONTROL_MIN_PRESENT_INTERVAL                    3:0
#define NV857D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD                         8:8
#define NV857D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_DISABLE                 (0x00000000)
#define NV857D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_ENABLE                  (0x00000001)
#define NV857D_HEAD_SET_PRESENT_CONTROL_BEGIN_FIELD                             6:4
#define NV857D_HEAD_SET_PIXEL_CLOCK(a)                                          (0x00000804 + (a)*0x00000400)
#define NV857D_HEAD_SET_PIXEL_CLOCK_FREQUENCY                                   21:0
#define NV857D_HEAD_SET_PIXEL_CLOCK_MODE                                        23:22
#define NV857D_HEAD_SET_PIXEL_CLOCK_MODE_CLK_25                                 (0x00000000)
#define NV857D_HEAD_SET_PIXEL_CLOCK_MODE_CLK_28                                 (0x00000001)
#define NV857D_HEAD_SET_PIXEL_CLOCK_MODE_CLK_CUSTOM                             (0x00000002)
#define NV857D_HEAD_SET_PIXEL_CLOCK_ADJ1000DIV1001                              24:24
#define NV857D_HEAD_SET_PIXEL_CLOCK_ADJ1000DIV1001_FALSE                        (0x00000000)
#define NV857D_HEAD_SET_PIXEL_CLOCK_ADJ1000DIV1001_TRUE                         (0x00000001)
#define NV857D_HEAD_SET_PIXEL_CLOCK_NOT_DRIVER                                  25:25
#define NV857D_HEAD_SET_PIXEL_CLOCK_NOT_DRIVER_FALSE                            (0x00000000)
#define NV857D_HEAD_SET_PIXEL_CLOCK_NOT_DRIVER_TRUE                             (0x00000001)
#define NV857D_HEAD_SET_CONTROL(a)                                              (0x00000808 + (a)*0x00000400)
#define NV857D_HEAD_SET_CONTROL_STRUCTURE                                       2:1
#define NV857D_HEAD_SET_CONTROL_STRUCTURE_PROGRESSIVE                           (0x00000000)
#define NV857D_HEAD_SET_CONTROL_STRUCTURE_INTERLACED                            (0x00000001)
#define NV857D_HEAD_SET_OVERSCAN_COLOR(a)                                       (0x00000810 + (a)*0x00000400)
#define NV857D_HEAD_SET_OVERSCAN_COLOR_RED                                      9:0
#define NV857D_HEAD_SET_OVERSCAN_COLOR_GRN                                      19:10
#define NV857D_HEAD_SET_OVERSCAN_COLOR_BLU                                      29:20
#define NV857D_HEAD_SET_RASTER_SIZE(a)                                          (0x00000814 + (a)*0x00000400)
#define NV857D_HEAD_SET_RASTER_SIZE_WIDTH                                       14:0
#define NV857D_HEAD_SET_RASTER_SIZE_HEIGHT                                      30:16
#define NV857D_HEAD_SET_RASTER_SYNC_END(a)                                      (0x00000818 + (a)*0x00000400)
#define NV857D_HEAD_SET_RASTER_SYNC_END_X                                       14:0
#define NV857D_HEAD_SET_RASTER_SYNC_END_Y                                       30:16
#define NV857D_HEAD_SET_RASTER_BLANK_END(a)                                     (0x0000081C + (a)*0x00000400)
#define NV857D_HEAD_SET_RASTER_BLANK_END_X                                      14:0
#define NV857D_HEAD_SET_RASTER_BLANK_END_Y                                      30:16
#define NV857D_HEAD_SET_RASTER_BLANK_START(a)                                   (0x00000820 + (a)*0x00000400)
#define NV857D_HEAD_SET_RASTER_BLANK_START_X                                    14:0
#define NV857D_HEAD_SET_RASTER_BLANK_START_Y                                    30:16
#define NV857D_HEAD_SET_RASTER_VERT_BLANK2(a)                                   (0x00000824 + (a)*0x00000400)
#define NV857D_HEAD_SET_RASTER_VERT_BLANK2_YSTART                               14:0
#define NV857D_HEAD_SET_RASTER_VERT_BLANK2_YEND                                 30:16
#define NV857D_HEAD_SET_RASTER_VERT_BLANK_DMI(a)                                (0x00000828 + (a)*0x00000400)
#define NV857D_HEAD_SET_RASTER_VERT_BLANK_DMI_DURATION                          11:0
#define NV857D_HEAD_SET_DEFAULT_BASE_COLOR(a)                                   (0x0000082C + (a)*0x00000400)
#define NV857D_HEAD_SET_DEFAULT_BASE_COLOR_RED                                  9:0
#define NV857D_HEAD_SET_DEFAULT_BASE_COLOR_GREEN                                19:10
#define NV857D_HEAD_SET_DEFAULT_BASE_COLOR_BLUE                                 29:20
#define NV857D_HEAD_SET_BASE_LUT_LO(a)                                          (0x00000840 + (a)*0x00000400)
#define NV857D_HEAD_SET_BASE_LUT_LO_ENABLE                                      31:31
#define NV857D_HEAD_SET_BASE_LUT_LO_ENABLE_DISABLE                              (0x00000000)
#define NV857D_HEAD_SET_BASE_LUT_LO_ENABLE_ENABLE                               (0x00000001)
#define NV857D_HEAD_SET_BASE_LUT_LO_MODE                                        30:30
#define NV857D_HEAD_SET_BASE_LUT_LO_MODE_LORES                                  (0x00000000)
#define NV857D_HEAD_SET_BASE_LUT_LO_MODE_HIRES                                  (0x00000001)
#define NV857D_HEAD_SET_BASE_LUT_LO_ORIGIN                                      7:2
#define NV857D_HEAD_SET_BASE_LUT_HI(a)                                          (0x00000844 + (a)*0x00000400)
#define NV857D_HEAD_SET_BASE_LUT_HI_ORIGIN                                      31:0
#define NV857D_HEAD_SET_OUTPUT_LUT_LO(a)                                        (0x00000848 + (a)*0x00000400)
#define NV857D_HEAD_SET_OUTPUT_LUT_LO_ENABLE                                    31:31
#define NV857D_HEAD_SET_OUTPUT_LUT_LO_ENABLE_DISABLE                            (0x00000000)
#define NV857D_HEAD_SET_OUTPUT_LUT_LO_ENABLE_ENABLE                             (0x00000001)
#define NV857D_HEAD_SET_OUTPUT_LUT_LO_MODE                                      30:30
#define NV857D_HEAD_SET_OUTPUT_LUT_LO_MODE_LORES                                (0x00000000)
#define NV857D_HEAD_SET_OUTPUT_LUT_LO_MODE_HIRES                                (0x00000001)
#define NV857D_HEAD_SET_OUTPUT_LUT_LO_ORIGIN                                    7:2
#define NV857D_HEAD_SET_OUTPUT_LUT_HI(a)                                        (0x0000084C + (a)*0x00000400)
#define NV857D_HEAD_SET_OUTPUT_LUT_HI_ORIGIN                                    31:0
#define NV857D_HEAD_SET_CONTEXT_DMA_LUT(a)                                      (0x0000085C + (a)*0x00000400)
#define NV857D_HEAD_SET_CONTEXT_DMA_LUT_HANDLE                                  31:0
#define NV857D_HEAD_SET_OFFSET(a,b)                                             (0x00000860 + (a)*0x00000400 + (b)*0x00000004)
#define NV857D_HEAD_SET_OFFSET_ORIGIN                                           31:0
#define NV857D_HEAD_SET_SIZE(a)                                                 (0x00000868 + (a)*0x00000400)
#define NV857D_HEAD_SET_SIZE_WIDTH                                              14:0
#define NV857D_HEAD_SET_SIZE_HEIGHT                                             30:16
#define NV857D_HEAD_SET_STORAGE(a)                                              (0x0000086C + (a)*0x00000400)
#define NV857D_HEAD_SET_STORAGE_BLOCK_HEIGHT                                    3:0
#define NV857D_HEAD_SET_STORAGE_BLOCK_HEIGHT_ONE_GOB                            (0x00000000)
#define NV857D_HEAD_SET_STORAGE_BLOCK_HEIGHT_TWO_GOBS                           (0x00000001)
#define NV857D_HEAD_SET_STORAGE_BLOCK_HEIGHT_FOUR_GOBS                          (0x00000002)
#define NV857D_HEAD_SET_STORAGE_BLOCK_HEIGHT_EIGHT_GOBS                         (0x00000003)
#define NV857D_HEAD_SET_STORAGE_BLOCK_HEIGHT_SIXTEEN_GOBS                       (0x00000004)
#define NV857D_HEAD_SET_STORAGE_BLOCK_HEIGHT_THIRTYTWO_GOBS                     (0x00000005)
#define NV857D_HEAD_SET_STORAGE_PITCH                                           19:8
#define NV857D_HEAD_SET_STORAGE_MEMORY_LAYOUT                                   20:20
#define NV857D_HEAD_SET_STORAGE_MEMORY_LAYOUT_BLOCKLINEAR                       (0x00000000)
#define NV857D_HEAD_SET_STORAGE_MEMORY_LAYOUT_PITCH                             (0x00000001)
#define NV857D_HEAD_SET_PARAMS(a)                                               (0x00000870 + (a)*0x00000400)
#define NV857D_HEAD_SET_PARAMS_FORMAT                                           15:8
#define NV857D_HEAD_SET_PARAMS_FORMAT_I8                                        (0x0000001E)
#define NV857D_HEAD_SET_PARAMS_FORMAT_VOID16                                    (0x0000001F)
#define NV857D_HEAD_SET_PARAMS_FORMAT_VOID32                                    (0x0000002E)
#define NV857D_HEAD_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16                       (0x000000CA)
#define NV857D_HEAD_SET_PARAMS_FORMAT_A8R8G8B8                                  (0x000000CF)
#define NV857D_HEAD_SET_PARAMS_FORMAT_A2B10G10R10                               (0x000000D1)
#define NV857D_HEAD_SET_PARAMS_FORMAT_A8B8G8R8                                  (0x000000D5)
#define NV857D_HEAD_SET_PARAMS_FORMAT_R5G6B5                                    (0x000000E8)
#define NV857D_HEAD_SET_PARAMS_FORMAT_A1R5G5B5                                  (0x000000E9)
#define NV857D_HEAD_SET_PARAMS_SUPER_SAMPLE                                     1:0
#define NV857D_HEAD_SET_PARAMS_SUPER_SAMPLE_X1_AA                               (0x00000000)
#define NV857D_HEAD_SET_PARAMS_SUPER_SAMPLE_X4_AA                               (0x00000002)
#define NV857D_HEAD_SET_PARAMS_SUPER_SAMPLE_X8_AA                               (0x00000003)
#define NV857D_HEAD_SET_PARAMS_GAMMA                                            2:2
#define NV857D_HEAD_SET_PARAMS_GAMMA_LINEAR                                     (0x00000000)
#define NV857D_HEAD_SET_PARAMS_GAMMA_SRGB                                       (0x00000001)
#define NV857D_HEAD_SET_PARAMS_RESERVED0                                        22:16
#define NV857D_HEAD_SET_PARAMS_RESERVED1                                        24:24
#define NV857D_HEAD_SET_CONTEXT_DMAS_ISO(a,b)                                   (0x00000874 + (a)*0x00000400 + (b)*0x00000004)
#define NV857D_HEAD_SET_CONTEXT_DMAS_ISO_HANDLE                                 31:0
#define NV857D_HEAD_SET_CONTROL_CURSOR(a)                                       (0x00000880 + (a)*0x00000400)
#define NV857D_HEAD_SET_CONTROL_CURSOR_ENABLE                                   31:31
#define NV857D_HEAD_SET_CONTROL_CURSOR_ENABLE_DISABLE                           (0x00000000)
#define NV857D_HEAD_SET_CONTROL_CURSOR_ENABLE_ENABLE                            (0x00000001)
#define NV857D_HEAD_SET_CONTROL_CURSOR_FORMAT                                   25:24
#define NV857D_HEAD_SET_CONTROL_CURSOR_FORMAT_A1R5G5B5                          (0x00000000)
#define NV857D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8                          (0x00000001)
#define NV857D_HEAD_SET_CONTROL_CURSOR_SIZE                                     26:26
#define NV857D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32                             (0x00000000)
#define NV857D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64                             (0x00000001)
#define NV857D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_X                               13:8
#define NV857D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_Y                               21:16
#define NV857D_HEAD_SET_CONTROL_CURSOR_COMPOSITION                              29:28
#define NV857D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_ALPHA_BLEND                  (0x00000000)
#define NV857D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_PREMULT_ALPHA_BLEND          (0x00000001)
#define NV857D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_XOR                          (0x00000002)
#define NV857D_HEAD_SET_CONTROL_CURSOR_SUB_OWNER                                5:4
#define NV857D_HEAD_SET_CONTROL_CURSOR_SUB_OWNER_NONE                           (0x00000000)
#define NV857D_HEAD_SET_CONTROL_CURSOR_SUB_OWNER_SUBHEAD0                       (0x00000001)
#define NV857D_HEAD_SET_CONTROL_CURSOR_SUB_OWNER_SUBHEAD1                       (0x00000002)
#define NV857D_HEAD_SET_CONTROL_CURSOR_SUB_OWNER_BOTH                           (0x00000003)
#define NV857D_HEAD_SET_OFFSET_CURSOR(a)                                        (0x00000884 + (a)*0x00000400)
#define NV857D_HEAD_SET_OFFSET_CURSOR_ORIGIN                                    31:0
#define NV857D_HEAD_SET_CONTEXT_DMA_CURSOR(a)                                   (0x0000089C + (a)*0x00000400)
#define NV857D_HEAD_SET_CONTEXT_DMA_CURSOR_HANDLE                               31:0
#define NV857D_HEAD_SET_DITHER_CONTROL(a)                                       (0x000008A0 + (a)*0x00000400)
#define NV857D_HEAD_SET_DITHER_CONTROL_ENABLE                                   0:0
#define NV857D_HEAD_SET_DITHER_CONTROL_ENABLE_DISABLE                           (0x00000000)
#define NV857D_HEAD_SET_DITHER_CONTROL_ENABLE_ENABLE                            (0x00000001)
#define NV857D_HEAD_SET_DITHER_CONTROL_BITS                                     2:1
#define NV857D_HEAD_SET_DITHER_CONTROL_BITS_DITHER_TO_6_BITS                    (0x00000000)
#define NV857D_HEAD_SET_DITHER_CONTROL_BITS_DITHER_TO_8_BITS                    (0x00000001)
#define NV857D_HEAD_SET_DITHER_CONTROL_MODE                                     6:3
#define NV857D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_ERR_ACC                     (0x00000000)
#define NV857D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_ERR_ACC                      (0x00000001)
#define NV857D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_2X2                         (0x00000002)
#define NV857D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_2X2                          (0x00000003)
#define NV857D_HEAD_SET_DITHER_CONTROL_PHASE                                    8:7
#define NV857D_HEAD_SET_CONTROL_OUTPUT_SCALER(a)                                (0x000008A4 + (a)*0x00000400)
#define NV857D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS                     2:0
#define NV857D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_1              (0x00000000)
#define NV857D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_2              (0x00000001)
#define NV857D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_3              (0x00000002)
#define NV857D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_3_ADAPTIVE     (0x00000003)
#define NV857D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_5              (0x00000004)
#define NV857D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS                   4:3
#define NV857D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_1            (0x00000000)
#define NV857D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_2            (0x00000001)
#define NV857D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_8            (0x00000002)
#define NV857D_HEAD_SET_CONTROL_OUTPUT_SCALER_HRESPONSE_BIAS                    23:16
#define NV857D_HEAD_SET_CONTROL_OUTPUT_SCALER_VRESPONSE_BIAS                    31:24
#define NV857D_HEAD_SET_PROCAMP(a)                                              (0x000008A8 + (a)*0x00000400)
#define NV857D_HEAD_SET_PROCAMP_COLOR_SPACE                                     1:0
#define NV857D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB                                 (0x00000000)
#define NV857D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601                             (0x00000001)
#define NV857D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709                             (0x00000002)
#define NV857D_HEAD_SET_PROCAMP_CHROMA_LPF                                      2:2
#define NV857D_HEAD_SET_PROCAMP_CHROMA_LPF_AUTO                                 (0x00000000)
#define NV857D_HEAD_SET_PROCAMP_CHROMA_LPF_ON                                   (0x00000001)
#define NV857D_HEAD_SET_PROCAMP_SAT_COS                                         19:8
#define NV857D_HEAD_SET_PROCAMP_SAT_SINE                                        31:20
#define NV857D_HEAD_SET_PROCAMP_TRANSITION                                      4:3
#define NV857D_HEAD_SET_PROCAMP_TRANSITION_HARD                                 (0x00000000)
#define NV857D_HEAD_SET_PROCAMP_TRANSITION_NTSC                                 (0x00000001)
#define NV857D_HEAD_SET_PROCAMP_TRANSITION_PAL                                  (0x00000002)
#define NV857D_HEAD_SET_PROCAMP_DYNAMIC_RANGE                                   5:5
#define NV857D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_VESA                              (0x00000000)
#define NV857D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_CEA                               (0x00000001)
#define NV857D_HEAD_SET_PROCAMP_RANGE_COMPRESSION                               6:6
#define NV857D_HEAD_SET_PROCAMP_RANGE_COMPRESSION_DISABLE                       (0x00000000)
#define NV857D_HEAD_SET_PROCAMP_RANGE_COMPRESSION_ENABLE                        (0x00000001)
#define NV857D_HEAD_SET_VIEWPORT_POINT_IN(a,b)                                  (0x000008C0 + (a)*0x00000400 + (b)*0x00000004)
#define NV857D_HEAD_SET_VIEWPORT_POINT_IN_X                                     14:0
#define NV857D_HEAD_SET_VIEWPORT_POINT_IN_Y                                     30:16
#define NV857D_HEAD_SET_VIEWPORT_SIZE_IN(a)                                     (0x000008C8 + (a)*0x00000400)
#define NV857D_HEAD_SET_VIEWPORT_SIZE_IN_WIDTH                                  14:0
#define NV857D_HEAD_SET_VIEWPORT_SIZE_IN_HEIGHT                                 30:16
#define NV857D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST(a)                            (0x000008D4 + (a)*0x00000400)
#define NV857D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_X                             15:0
#define NV857D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_Y                             31:16
#define NV857D_HEAD_SET_VIEWPORT_SIZE_OUT(a)                                    (0x000008D8 + (a)*0x00000400)
#define NV857D_HEAD_SET_VIEWPORT_SIZE_OUT_WIDTH                                 14:0
#define NV857D_HEAD_SET_VIEWPORT_SIZE_OUT_HEIGHT                                30:16
#define NV857D_HEAD_SET_VIEWPORT_SIZE_OUT_MIN(a)                                (0x000008DC + (a)*0x00000400)
#define NV857D_HEAD_SET_VIEWPORT_SIZE_OUT_MIN_WIDTH                             14:0
#define NV857D_HEAD_SET_VIEWPORT_SIZE_OUT_MIN_HEIGHT                            30:16
#define NV857D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS(a)                            (0x00000900 + (a)*0x00000400)
#define NV857D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_USABLE                        0:0
#define NV857D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_USABLE_FALSE                  (0x00000000)
#define NV857D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_USABLE_TRUE                   (0x00000001)
#define NV857D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH                   11:8
#define NV857D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_8             (0x00000000)
#define NV857D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_16            (0x00000001)
#define NV857D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_32            (0x00000003)
#define NV857D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_64            (0x00000005)
#define NV857D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_SUPER_SAMPLE                  13:12
#define NV857D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_SUPER_SAMPLE_X1_AA            (0x00000000)
#define NV857D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_SUPER_SAMPLE_X4_AA            (0x00000002)
#define NV857D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_SUPER_SAMPLE_X8_AA            (0x00000003)
#define NV857D_HEAD_SET_OVERLAY_USAGE_BOUNDS(a)                                 (0x00000904 + (a)*0x00000400)
#define NV857D_HEAD_SET_OVERLAY_USAGE_BOUNDS_USABLE                             0:0
#define NV857D_HEAD_SET_OVERLAY_USAGE_BOUNDS_USABLE_FALSE                       (0x00000000)
#define NV857D_HEAD_SET_OVERLAY_USAGE_BOUNDS_USABLE_TRUE                        (0x00000001)
#define NV857D_HEAD_SET_OVERLAY_USAGE_BOUNDS_PIXEL_DEPTH                        11:8
#define NV857D_HEAD_SET_OVERLAY_USAGE_BOUNDS_PIXEL_DEPTH_BPP_16                 (0x00000001)
#define NV857D_HEAD_SET_OVERLAY_USAGE_BOUNDS_PIXEL_DEPTH_BPP_32                 (0x00000003)
#define NV857D_HEAD_SET_PROCESSING(a)                                           (0x00000910 + (a)*0x00000400)
#define NV857D_HEAD_SET_PROCESSING_USE_GAIN_OFS                                 0:0
#define NV857D_HEAD_SET_PROCESSING_USE_GAIN_OFS_DISABLE                         (0x00000000)
#define NV857D_HEAD_SET_PROCESSING_USE_GAIN_OFS_ENABLE                          (0x00000001)
#define NV857D_HEAD_SET_CONVERSION(a)                                           (0x00000914 + (a)*0x00000400)
#define NV857D_HEAD_SET_CONVERSION_GAIN                                         15:0
#define NV857D_HEAD_SET_CONVERSION_OFS                                          31:16
#define NV857D_HEAD_SET_SPARE(a)                                                (0x00000BBC + (a)*0x00000400)
#define NV857D_HEAD_SET_SPARE_UNUSED                                            31:0
#define NV857D_HEAD_SET_SPARE_NOOP(a,b)                                         (0x00000BC0 + (a)*0x00000400 + (b)*0x00000004)
#define NV857D_HEAD_SET_SPARE_NOOP_UNUSED                                       31:0

#ifdef __cplusplus
};     /* extern "C" */
#endif
#endif // _cl857d_h

